Thursday, April 23, 2009

AMD DirectConnect 2.0 Prompts New Opteron Roadmap

On the sixth birthday of the launching of Opteron, AMD described what it called the majority of significant growth in the execution since beginning of Optreron 'of S: directly dependent architecture 2.0. AMD also announced the series of Opteron 4000 and 6000, which will address one to the market of processor of four-casing, and prolonged its roadmaps of processor of waiter outside to the calendar 2013.

AMD indicated that Tuesday that it will draw inside launching from its six-core processor of Istanbul waiter in can, with the forwarding of systems in June. Wednesday, AMD announced Opteron EE, a basic processor power of 40 Watts designed for the calculation of cloud.

Although AMD currently trails Intel rival in the race with the geometries never-fines, the advantage which the company continued is in a more effective design, going back to the original processor of Athlon for GCV. AMD 'last designs of processor of S included a more effective manner to pass from the data of a core to the others, called HyperTransport, and the part eliminated from the tiddlywinks by integrating the controller of memory, known under the name of directly dependent. Intel later adopted two technologies, though with its own architecture.

Because a person of marketing said to me, it the 'ok of S to copy the past but the future must be created, Nigel says Dessau, AMD 'marketing director of S.

Wednesday, AMD described the next stages in its plan to maintain its wire technological: 2.0 directly dependent. Principal Traiteur here is that our next great jump in technology is 2.0 directly dependent, Pat says Patla, a vice-president of AMD and managing director of his businesses of waiter.

DCA 2.0, as the company calls it, will allow the 12 cores Magny-Course architectures, that AMD will start to sow customers by in second half of 2009 and will be transported during first half of 2010, Patla said. Instead of the two-track controller of memory found in current architecture, AMD will double it with four channels; three bonds of HyperTransport will be climbed up to four. AMD also envisages to update its virtualisation of AMD-V and of technologies of power of AMD-P with possibilities of second generation, frameworks said.

The goal was to improve all the components of directly dependent: the virtualizatin, the execution, and balance it, Patla indicated. Compared with Changha�, the architecture of DCA of Magny-Course 2.0 will twice include the channels of memory, 3.3 times the speed of memory, 1.9 times the bandwidth of HyperTransport, and 2.2 times the hiding-place.

The goal was to improve the number and the execution of virtualized applications functioning on a waiter, important for medium-sized companies and large companies. AMD 'continuation of the second generation of S AMD-V, launching with Magny-Course, will include the virtualized input-output, the fast indexing of virtualisation, labelled TLBs, the positive prolonged and asymmetrical migration. Several of the possibilities of management of power are already established in Opteron EE.

AMD 'new families of S Opteron

AMD will also launch two new families of the products: Opteron 6000 and Opteron 4000 series. Conceived for the environments virtualisation-intensives, Opteron 6000 series will be conceived for 2 or 4 casings, with 4 channels of memory U/RDDR-3 and until 12 DIMMs by casing. The 4000 series, while waiting, will be sold in the file and the web server, some environments of cloud and the HPC: the family will be designed for 1 - and 2 environments of casing, with two channels of the memory and until four DIMMs by casing.

The 6000 and 4000 series will belong to of Maranello of and San Marino platforms, that AMD described in its update of roadmaps, as an element of art accompanying this history.

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